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The practical limits of MASH Delta-Sigma Modulators designed to maintain very long controllable sequence lengths for structured tone mitigation

机译:MASH Delta-Sigma调制器的实际限制,旨在保持非常长的可控制序列长度,以减轻结构音调

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摘要

The delta-sigma modulator (DSM) is an essential block for a Fractional-N (FN) frequency synthesizers and is used for generating the fractional part of the division ratio. Digital DSMs (DDSM) with rational input and rational initial conditions can be thought as Finite State Machines (FSM) and they always produce finite length sequences in accordance with the applied input. To provide smooth quantization noise power distribution (tone free) and to get rid of structured tones, the modulator should complete its cycle and return to initial starting state. This method is called maintaining controllable sequence length. In this paper, the practicality of this method will be investigated for DDSMs composed of up to 5th order MASH 1-1-1-1-1 structures by considering lock time requirements of the synthesizers designed for wireless transceiver applications such as GSM900, DCS-1800, UMTS(WCDMA),WLAN, ZigBee and Bluetooth.
机译:Δ-Σ调制器(DSM)是分数N(FN)频率合成器的基本模块,用于生成分频比的小数部分。具有合理输入和合理初始条件的数字DSM(DDSM)可以被认为是有限状态机(FSM),它们总是根据所应用的输入产生有限长度的序列。为了提供平滑的量化噪声功率分布(无音频)并摆脱结构化的音频,调制器应完成其周期并返回到初始启动状态。这种方法称为维持可控制的序列长度。在本文中,将通过考虑为无线收发器应用(如GSM900,DCS-MS)设计的合成器的锁定时间要求,研究这种方法对由5阶MASH 1-1-1-1-1结构组成的DDSM的实用性。 1800,UMTS(WCDMA),WLAN,ZigBee和蓝牙。

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  • 作者

    Telli, Ali T.; Kale, Izzet;

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  • 年度 2009
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  • 原文格式 PDF
  • 正文语种 {"code":"en","name":"English","id":9}
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